Importing Netlist Placing Components
Now that we have created the required symbols ( footprints), we are ready to import the netlist from the orcad. In the OrCAD, click tools -> create netlist. Select Allegro in the top row. In the Netlist Files Directory, select the suitable directory. This will create the required directory.
Creating Border Outline
Table : Allegro PCB Design Tutorial
Now zoom suitably. To add a boar outine, click Add -> Rectangle. In the Options, select Board Geometry as the Class and Outline as the subclass. We want to add a board outline of dimension 4″ by 6″. In the command write x 0 0. This is the left bottom corner of the outline. Now write x 6000 4000. This is the upper right coordinate of the rectangle. This will create a Board outline.
Draw secod rectangle enclosed by the Board Outline. The class for this rectangle should be Route Keepin, and Subclass All. This wil ensure that any attempt to route outside the board outline will create a DRC error.
You may also draw a third rectangle, the same size as the second one and overlapping it, with Class Package Keepin, subclass All. This is when you want no package to be out of the board. You will however notice that some edge connectors may cause unnecessary DRC error.
Now Go to File -> Import and select the netlist directory where you have generated the netlist from the OrCAD. If all symbols are in place, it will import the netlist.
At this stage you do not see any component. You will have to place the components one by one. Click Place -> Manually. Select the components one by one and place them. You can rotate the component using edit -> spin. You can place the component on reverse side using Edit -> Mirror.
Increasing Number of Layers to 4
We still have a PCB that has only 2 Layers. Let us increase it to 4 Layers. Click on Setup -> Cross Section. It will show a two layer PCB. Click on the right arrow on the first column and right click and click on insert. Insert two more FR4 and two more copper layers placed alternatively. This will create a 4 Layer stack up as follows. Give Etch Subclass name GND for 1st Inner layer and VDD for second inner layer.
The recent trend has been to use all positive layers, so we will leave DRC as photo film type as positive.
At this stage your stack up will look as follows.
Adding Ground and Power Etch Rectangle
We should now add Power and Ground Etch rectangle.
Go to Add -> Rectangle and add a filled rectangle within the previously defined keepins; the class should be Etch and the Subclass Vdd. Repeat the same with Subclass Gnd.
On the right side of the screen, go to Visibility (marked 2 in Fig. 15) and unselect all layers except for Gnd.
Go to Shape -> Select Shape or Void and click on the Gnd rectangle you drew. Select the signal name �Gnd� from the list of imported nets on the right side of the screen. Similarly, assign the Vdd net by setting visibility.
Via for Routing
Our Design is ready for routing, except one thing. We have not defined vias that we will be using for routing. Designing a via is no different than designinmg the through hole padstack. After you have designed a through hole padstack via, Go to Setup -> Constraints. Under Physical Rules Set section, click on the Set values�, scroll down on the pop-up window and select the via you previously defined, and click on �Add�. Close the Constraints Window.