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Interview Questions for PCB Design Engineer Job

April 27th, 2011

Here is a compilation of the questions that may be asked to a PCB Design Engineer. Be sure to read a lot about high speed design rules, layer stackup and characteristic impedance.

Q1. How do you calculate the trace impedance of a PCB trace ?

Answer – There are many methods. A formula method gives a quick result, though it is not highly accurate. A 2D Field solver gives more accurate result. The Trace impedance depends upon the width of the trace, separation from the ground / power plane, and the relative permittivity of the material

Q2. What is the difference between a blind and buried via

Answer -blind vias aare use to connect an inner layer to either the top or bottom layer. A buried via is used for connecting two inner layers. It does not go either to the top or the bottom layer. A regular via ( different from the blind and the buried via connects the top and the bottom layer and also passes through the inner layers.

Do not stop here. Go ahead and draw the diagram of the blind and the buried via.

Q3. What is the use of a decoupling capacitor.

Answer – A decoupling capacitor is used to smoothen the power supply noise. It should be placed as close to the ICs for which it is intended as possible.

Q4. What is DRC ? What Kind of DRC errors you find in PCB Design ?

Answer – DRC stands for Design Rule checking. A PCB should not have any electrical failure before we tape out for the manufacturing. Commong DRC errors include, trace to pad violation, pad to pad violation, component keep out violation. Additionally a PCB Design may have high speed design rule related contraints. This may include, length matching constraints, differential signal length mathching constraint.

Q5. What are the things you should do you ensure design for compliance for EMI ?

Answer – We should use commond mode chokes for all cables connectors. The common mode chokes should be placed as close to the connector as possible. The Power and ground planes should be as close to each other as possible. The High speed signal should refer to a ground or power plane and should not cross a split plane. Stitching capacitor should be used in case split plane is used.

Q6.A large thermal pad is divided into four sections ? What is the use of it ?

Answer – The open area between the 4 sections lead to escape of the gases during the reflow and soldering process. It leads to better manufacturability.

Q7. The width of a trace is increased ? Will its characteristic impedance increase of decrease ?

Answer – The Capacitance per unit length of the trace increases and therefore, the characteristic impedance of the trace decreases.

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  1. Jyothikamsali
    January 18th, 2012 at 04:50 | #1

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  2. dolly thakur
    August 18th, 2012 at 05:14 | #2

    hi…
    This questions are very useful,thanks.IF you some more questions So please send me.

  3. Mallappa Patil
    August 23rd, 2012 at 01:01 | #3

    hi…
    Really this questions are very useful,thanks.I need some more questions So please send me.

  4. Madhu
    December 3rd, 2012 at 04:27 | #4

    hi
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  5. sumalatha
    December 15th, 2012 at 04:18 | #5

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  6. February 25th, 2013 at 03:58 | #6

    Hi, these questions are very useful.thanks

  7. Praveen
    November 19th, 2013 at 11:19 | #7

    Thanks Forum…. Definitely helpful…..Very discrete.

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